I got my PhD in Electronics Engineering (Digital VLSI) from The American University in Cairo (Egypt). In alignment with my PhD research, I had 2 successful tape-outs (chips) and published 5 papers as a first author in highly ranked transactions and conferences like TCAS-I, TCAS-II and ISCAS. 

Then, I joined the Computer Systems Laboratory at Cornell University (US) for two years as a Postdoctoral Associate. I collaborated with researchers from top-ranked universities, such as Princeton University, University of Washington, and Cornell University, to develop large-scale computing architectures for data-intensive applications like AI. My contribution at Cornell University over two years led to 7 publications including prestigious conferences like ISCAS, HPCA and CICC. 

Then, I joined the Centre for Electronics Frontiers (CEF) at The University of Edinburgh (UK) as a Research Fellow (previously at University of Southampton). Currently, I work on bridging the gap between emerging technologies and the ever-increasing performance demands of AI models, especially Convolutional Neural Networks (CNNs) and Large Language Models (LLMs).
 Since I joined CEF, I am leading three research projects and had 17 publications (July 2025) (including 4 IEEE TCAS-I, 1 IEEE-TCASAI, 1 IEEE OJCAS, 1 Frontiers Nanoelectronics, 5 IEEE ISCAS and 2 IEEE NEWCAS). I also filed 5 patents and contributed significantly to 6 AI Chips. Moreover, I am a Researcher Co-PI of a successful grant “Prosensing” with a budget of 1.45 million GBP (UKRI EPSRC NSS). Meanwhile, I collaborated with researchers from Imperial College London (UK) on building a characterization chip with a million RRAM devices, and I lead a collaboration with Nottingham Trent University (UK) on developing in-sensors AI processing architectures. Furthermore, I advise 3 Postdoctoral Associates and two PhD students, and co-advised 4 MSc. students. I teach 2 courses on Digital Systems for undergraduate and MSc. students. I organise an annual 5-day workshop "ASIC-BASIC" at University of Edinburgh to provide fundamental knowledge of the digital ASIC design flow (from RTL to GDS). I also collaborated with AMD and ARM (UK) to build a new course on Digital ASIC design for AI. 

My research focuses on novel AI Computing Architectures with extensive exploration of: In-Memory Computing (IMC), Stochastic Computing (SC), Spatial Dataflows & Systolic Arrays, Non-Binary Computing Domains, Beyond Von Neumann Architectures, Emerging Technologies, Memories, and Energy-Efficient Digital Design. My research philosophy adopts two themes: 1) AI Computing Systems using Today’s technologies, including spatial dataflows, maximum data utilization, and hardware specialization, and 2) Unconventional AI Computing Systems using Tomorrow’s technologies like in-memory computing emerging devices and unconventional AI Computing Paradigms like bitstream computing.