Journal article
International Symposium on Circuits and Systems, 2017
+44 (0) 7950676030
Department of Electrical and Electronic Engineering
The University of Manchester
APA
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Agwa, S. O., Yahya, E., & Ismail, Y. (2017). Power efficient AES core for IoT constrained devices implemented in 130nm CMOS. International Symposium on Circuits and Systems.
Chicago/Turabian
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Agwa, Shady O., Eslam Yahya, and Y. Ismail. “Power Efficient AES Core for IoT Constrained Devices Implemented in 130nm CMOS.” International Symposium on Circuits and Systems (2017).
MLA
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Agwa, Shady O., et al. “Power Efficient AES Core for IoT Constrained Devices Implemented in 130nm CMOS.” International Symposium on Circuits and Systems, 2017.
BibTeX Click to copy
@article{shady2017a,
title = {Power efficient AES core for IoT constrained devices implemented in 130nm CMOS},
year = {2017},
journal = {International Symposium on Circuits and Systems},
author = {Agwa, Shady O. and Yahya, Eslam and Ismail, Y.}
}